2.2. Voltage reference
The voltage reference is build around D8 which works at zero temperature coefficient current. This means that the resistance of the Zener diode doesn't depend on temperature, and this effect is due to mixing of two effects: the reverse-biased and avalanche breakdown. These two effects, one having a negative temperature coefficient and the other positive, mix perfectly in the 5.6V Zener diode, that's why the 5.6V Zener operates at zero temperature coefficient current.
Amplification of the U1 is 2, given by the voltage divider R5 and R6 of the positive feedback loop. The referent voltage of 5.6V is biased by the ground voltage of the power supply's output (not the circuit's ground voltage). The difference between the circuit ground and the output ground (Vgnd) is produced by the ballast resistor R7. All the current that the power supply supplies to the output flows also through R7. Because the power supply is rated at 4A max the difference between Vgnd and the circuit's ground stays below 1V.
Referent voltage Vref from the U1 scales through two potentiometers. The first P1F is for fine and P1C for coarse adjustment of the voltage. Potentiometers P1F and P1C are mounted on the front of the casing. Fine adjustment is in the range from 0 to 687Ω of the voltage set by the coarse potentiometer. Because of the parallel connection with a fixed resistor the fine adjustment doesn't have a linear response, instead, it changes slower as the resultant resistance approaches the maximum value of 687Ω. The adjusted referent voltage (Vadj) is passed to the next op-amp which amplifies the voltage (adjustable - around 3 times) and powers the output transistors.
2.3. Output amplifier
The output stage is constructed as voltage amplifier with U2 with adjustable amplification and an output buffer transistors for amplifying the current. Selected voltage (Vadj) is introduced to the positive input of U2 from the voltage adjustment circuit. In case the current limiter is on, Vadj is bypassed by the voltage set by U3 (Vo3). Bypassing is in a manner that Vo3 is low enough that D9 is forward biased. In both cases the voltage on the positive input is Vi2, being Vi2 = Vadj in the voltage source and Vi2 = Vo3 + 0.7V in the current source regime.
The op-amp tries to bring its negative input voltage level to Vi2. This is performed by forcing the voltage on its output (pin 6) to the point when it becomes equal to Vo2 = Vi2 · (TRIM1 + R11)/R11. Here a trimmer potentiometer is installed so we can set the amplification of the output amplifier in order to have P1 working in its full range. In this case the referent voltage goes from 0 - 11.2V, so the TRIM1 is around the same value as R11, which gives amplification of 2. Amplification is only for the DC component, any fast changes in the voltage Vo2 will pass through C6 and will be attenuated by the feedback loop build around U2. Also, possible noise coming from Vadj is grounded by C4, and some fast changes produced by U2 itself will be also passed by C9 and attenuated by the negative input of U2.
Circuit built around Q1 is used to protect the whole power supply from breakdown of the negative rail. In the case where something happens to the negative rail, the -5.6V disappears and BE junction of Q1 becomes forward biased. This brings Q1 in saturation and sinks all current from the base of Q2 shutting it off and successively shutting Q4 off.
Current amplification is performed by the Darlington pair Q2 and Q4, here we need Q2 because the op-amp cannot output the current needed to power a 2N3055 transistor in active regime. The capacitor C7 flattens high frequency noise and D11 is fly-back diode (in case some inductive load connected to the output gives negative spikes).
2.4. Current limiter
The current limiter is build around U3 which is used as a voltage comparator. When no load is applied, and the output current is zero, U3 gives 25V on its output (Vo3). This voltage level doesn't affect the output amplifier U2 because the diode D9 is reverse biased (see section 2.3). The output voltage Vo3 changes when current through the ballast resistor R7 is sufficient and Vgnd is slightly higher than the voltage on the positive input. When this happens the input of U3 is in inverse polarization, and the output swings from 25V to a negative value. The negative value of Vo3 makes the diode D9 forward biased and U2's positive input becomes same as Vo3 plus 0.7V.